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Elinnos
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mistral-7b-elip-bridge-final-v1

Text Generation
PEFT
Safetensors
English
systemverilog
verilog
rtl
hardware-design
ahb2apb-bridge
amba
semiconductor
ip-design
lora
mistral
Model card Files
xet
Community
mistral-7b-elip-bridge-final-v1

Commit History

Upload fine-tuned Mistral-7B for AHB2APB bridge design
9c644fd
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Prithvik-1 commited on

initial commit
5880e89
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Prithvik-1 commited on